Photos - Make It Tea

Try to learn something about everything, and everything about somethingThomas Huxley “Darwin's bulldog” (1824-1895)

Trace: • CA65 Setup • Svx Mobile • APRS • Svxlink Update (Dual Gateway) • Monitor • YaDDNet

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====== Photos ======

** Some pics of the project **

===== Version 1 - veroboard =====

<WRAP group>

<WRAP third column>

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Mark 1 in all its glory

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Twin LCD displays. 2-line for RTC and Uptime. 4 Line for monitor.


</WRAP>

<WRAP third column>

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RTC Chip and 2 debounced push buttons on the top breadboard. RTC is fed with 32.768kHz from a function generator
awaiting for a new xtal.

4-input AND gate for VIA IRQ connection to CPU on the other breadboard.


{{:public:computers:6502:img_20220929_081737_023_1.jpg?400|}}

I/O board with 2 65C22 VIAs. Beeper piezo sounder in the Altoids tin.

</WRAP>

<WRAP third column>

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</WRAP>




</WRAP>

===== Version 2 =====


  * Planned to be built using Wirewrap methods but seems to have been forgotten about
    * I'll possibly return to the project in winter 2024/5?

--- //John Pumford-Green 29/09/22 08:21//


===== Further Information =====


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