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| public:computers:6502:photos [04/04/24 21:25 BST] – john | public:computers:6502:photos [29/01/26 13:22 GMT] (current) – [Version 1 - veroboard] john | ||
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| Mark 1 in all its glory | Mark 1 in all its glory | ||
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| Twin LCD displays. 2-line for RTC and Uptime. 4 Line for monitor. | Twin LCD displays. 2-line for RTC and Uptime. 4 Line for monitor. | ||
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| RTC Chip and 2 debounced push buttons on the top breadboard. RTC is fed with 32.768kHz from a function generator | RTC Chip and 2 debounced push buttons on the top breadboard. RTC is fed with 32.768kHz from a function generator | ||
| awaiting for a new xtal. | awaiting for a new xtal. | ||
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| I/O board with 2 65C22 VIAs. Beeper piezo sounder in the Altoids tin. | I/O board with 2 65C22 VIAs. Beeper piezo sounder in the Altoids tin. | ||
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| ===== Version 2 ===== | ===== Version 2 ===== | ||
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| + | * Planned to be built using Wirewrap methods but seems to have been forgotten about | ||
| + | * I'll possibly return to the project in winter 2024/5? | ||
| --- //John Pumford-Green 29/09/22 08:21// | --- //John Pumford-Green 29/09/22 08:21// | ||